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LTC4071 1 4071fc typical a pplica t ion descrip t ion li-ion/polymer shunt battery charger system with low battery disconnect the ltc ? 4071 allows simple charging of li-ion/polymer batteries from very low current, intermittent or continuous charging sources. a near-zero current low battery latch - ing disconnect function protects even the lowest capacity batteries from deep discharge and potentially irreparable damage. the 550na to 50ma operating current makes charging possible from previously unusable sources. with its low operating current the LTC4071 is well suited to charge low capacity li-ion or thin film batteries in energy harvesting applications. the unique architecture of the LTC4071 allows for an extremely simple battery charger solution, requiring just one external resistor. the LTC4071 offers a pin selectable float voltage with 1% accuracy. the integrated thermal battery qualifier extends battery lifetime and improves reliability by automatically reducing the battery float voltage at ntc thermistor tem - peratures above 40c. the LTC4071 also provides two pin selectable low battery disconnect levels and a high battery status output. the device is offered in two thermally enhanced packages, a compact low profile (0.75mm) 8-lead (2mm 3mm) dfn and an 8-lead msop package. l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. fea t ures a pplica t ions n charger plus pack protection in one ic n low operating current (550na) n near zero current (<0.1na) low battery disconnect function to protect batteries from over-discharge n pin selectable low battery disconnect level: 2.7v or 3.2v n 1% float voltage accuracy over temperature n 50ma maximum internal shunt current n pin selectable float voltage options: 4.0v , 4.1v, 4.2v n ultralow power pulsed ntc float conditioning for li-ion/polymer protection n suitable for intermittent, continuous and ver y low power charging sources n high battery status output n thermally enhanced, low profile (0.75mm) 8-lead (2mm 3mm) dfn and msop packages n low capacity, li-ion/polymer batter y back-up n thin film batteries n energy scavenging/harvesting n solar power systems with back-up n memory back-up n embedded automotive 4071 ta01a LTC4071 adj bat r in gnd li-ion ntc v cc v in lbsel + to system load: v cc 1f temperature (c) ?25 0 i leak (a) 10p 125 4071 ta01b 1p 0.1p 5025 75 100 1n 100p 10n 100n v bat = 2.65v battery disconnect i leak vs temperature
LTC4071 2 4071fc a bsolu t e maxi m u m r a t ings i cc , i bat ............................................. 6 0ma continuous i bat ............................... 40 0ma for single pulse < 10ms i cc ............................... C4 00ma for single pulse < 10ms adj, ntc, ntcbias, hbo voltages .. C 0.3v to v cc + 0.3v (notes 1, 2) top view 9 gnd ddb package 8-lead (3mm 2mm) plastic dfn 5 6 7 8 4 3 2 1ntcbias ntc adj hbo v cc bat gnd lbsel t jmax = 125c, ja = 76c/w exposed pad (pin 9) is not internally connected, must be soldered to pcb, gnd to obtain ja 1 2 3 4 ntcbias ntc adj hbo 8 7 6 5 v cc bat gnd lbsel top view 9 gnd ms8e package 8-lead plastic msop t jmax = 125c, ja = 40c/w exposed pad (pin 9) is not internally connected, must be soldered to pcb, gnd to obtain ja p in c on f igura t ion o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range LTC4071eddb#pbf LTC4071eddb#trpbf lfxf 8-lead (3mm 2mm) plastic dfn C40c to 125c LTC4071iddb#pbf LTC4071iddb#trpbf lfxf 8-lead (3mm 2mm) plastic dfn C40c to 125c LTC4071ems8e#pbf LTC4071ems8e#trpbf ltfxg 8-lead plastic msop C40c to 125c LTC4071ims8e#pbf LTC4071ims8e#trpbf ltfxg 8-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ lbsel voltage ............................................. C 0.3v to 6v operating junction temperature range .. C 40c to 125c storage temperature range .................. C 65c to 150c peak reflow temperature ..................................... 26 0c e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating junction temperature range. conditions are v ntc = v adj = v cc , v lbsel = gnd, t a = 25c unless otherwise specified. current into a pin is positive and current out of a pin is negative. all voltages are referenced to gnd unless otherwise noted. (note 2) symbol parameter conditions min typ max units v float programmable float voltage 10a i cc 25ma v adj = 0v, 0c < temp < 125c v adj = 0v l 3.96 3.88 4.0 4.0 4.04 4.04 v v v adj = float, 0c < temp < 125c v adj = float l 4.06 3.98 4.1 4.1 4.14 4.14 v v v adj = v cc , 0c < temp < 125c v adj = v cc l 4.16 4.07 4.2 4.2 4.24 4.24 v v i ccmax maximum shunt current v cc > v float l 50 ma i ccq v cc operating current v hbo low, adj = v cc l 550 1200 na
LTC4071 3 4071fc e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC4071 is tested under pulsed load conditions such that t j t a . the LTC4071e is guaranteed to meet performance specifications for junction temperatures from 0c to 85c. specifications over the the l denotes the specifications which apply over the full operating junction temperature range. conditions are v ntc = v adj = v cc , v lbsel = gnd, t j = 25c unless otherwise specified. current into a pin is positive and current out of a pin is negative. all voltages are referenced to gnd unless otherwise noted. (note 2) C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LTC4071i is guaranteed over the full C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operation conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. symbol parameter conditions min typ max units low battery disconnect i leak battery disconnect leakage current v cc < v bat = 2.65v l 0.01 0.01 25 na na r dson resistance of v cc C bat switch i bat = C1ma, v hbo high 4 6 v lbd low battery disconnect v bat falling, i bat = C1ma, lbsel = v cc , 0c < temp < 125c 2.60 2.70 2.79 v v bat falling, i bat = C1ma, lbsel = v cc l 2.52 2.70 2.79 v v bat falling, i bat = C1ma, lbsel = gnd, 0c < temp < 125c 3.05 3.20 3.28 v v bat falling, i bat = C1ma, lbsel = gnd l 2.95 3.20 3.28 v v lbc_bat low battery connect v bat rising, i bat = C1ma, lbsel = v cc 2.97 v v bat rising, i bat = C1ma, lbsel = gnd 3.53 v v lbc_vcc low battery connect v cc rising, lbsel = v cc v cc rising, lbsel = gnd 3.6 4.19 v v high battery status v hbth hbo threshold (v float C v cc ) v cc rising l 15 40 75 mv v hbhy hysteresis 100 mv status output: hbo v ol cmos output low i sink = 1ma, v cc = 3.7v 0.5 v v oh cmos output high i source = C0.5ma, i cc = 1.5ma v cc C 0.6 v selection inputs: adj, lbsel v adj_il adj v il input logic low level l 0.3 v v adj_ih adj v ih input logic high level l v cc C 0.3 v i adj(z) allowable adj leakage current in floating state l 3 a v lbsel_il lbsel v il input logic low level l 250 mv v lbsel_ih lbsel v ih input logic high level l 1.4 v i lbsel lbsel leakage current 0 lbsel v cc l C5 0 5 na ntc i ntc ntc leakage current 0v ntc v cc l C5 0 5 na i ntcbias average ntcbias sink current pulsed duty cycle < 0.002% 30 50 pa ntc th1 ntc comparator falling thresholds v ntc as percentage of v ntcbias amplitude 35.5 36.5 38 % ntc th2 28.0 29.0 30.5 % ntc th3 21.8 22.8 23.8 % ntc th4 16.8 17.8 18.8 % ntc hy hysteresis 30 mv ?v float(ntc) delta float voltage per ntc comparator step ntc falling below one of the ntc th thresholds adj = 0v adj = floating adj = v cc C57 C82 C107 C50 C75 C100 C43 C68 C93 mv mv mv
LTC4071 4 4071fc typical p er f or m ance c harac t eris t ics r ds(on) vs temperature i cc vs v cc lbd/lbc vs temperature (lbsel = v cc ) hbo thresholds vs temperature v f vs temperature load regulation lbc vs i b at lbd/lbc vs temperature (lbsel = gnd) t a = 25c, unless otherwise noted. i ccq vs temperature i bat (ma) 0.01 lbc_v cc (v) 3.5 3.3 100 4071 g01 3.1 2.9 0.1 1 10 3.9 3.7 4.1 4.3 lbsel = gnd lbsel = v cc temperature (c) ?50 ?25 lbd/lbc (v) 3.4 3.2 125 4071 g02 3.0 0 25 50 75 100 3.8 3.6 4.0 4.2 lbc_v cc lbc_bat lbd adj = v cc ntc = ntcbias i bat = ?1ma temperature (c) ?50 ?25 lbd/lbc (v) 2.9 2.7 125 4071 g03 2.5 0 25 50 75 100 3.3 3.1 3.5 3.7 lbc_v cc lbc_bat lbd adj = v cc ntc = ntcbias i bat = ?1ma temperature (c) ?50 ?25 r ds(on) () 4.0 3.5 125 4071 g04 3.0 0 25 50 75 100 5.0 4.5 5.5 v cc (v) 0 0.5 i cc (na) 600 800 1000 400 200 4.0 4071 g05 0 1 1.5 2 2.5 3 3.5 1600 1800 1200 1400 2000 125c rising 125c falling 25c rising 25c falling ?45c rising ?45c falling adj = v cc lbsel = v cc ntc = ntcbias temperature (c) ?50 ?25 i ccq (na) 500 400 125 4071 g06 300 0 25 50 75 100 900 700 600 800 1000 adj = v cc lbsel = v cc ntc = ntcbias hbo low temperature (c) ?50 ?25 hboth/hy (mv) 125 4071 g07 0 0 25 50 75 100 200 100 50 150 250 hbohy hboth adj = v cc lbsel = v cc ntc = ntcbias temperature (c) ?50 ?25 v f (v) 125 4071 g08 3.95 0 25 50 75 100 4.15 4.20 4.05 4.00 4.10 4.25 adj = gnd adj = float adj = v cc lbsel = v cc ntc = ntcbias i cc (ma) 0 v cc (v) 60 4071 g09 4.095 10 20 30 40 50 4.115 4.120 4.105 4.100 4.110 4.125 adj = float ntc = ntcbias lbsel = v cc
LTC4071 5 4071fc typical p er f or m ance c harac t eris t ics v f vs ntc temperature mp1 body diode hbo v oh lbsel v il /v ih vs temperature t a = 25c, unless otherwise noted. hbo v ol ntcbias period vs temperature ntcbias pulse width vs temperature i bat (ma) 0.01 v cc ? v bat (v) 100 4071 g10 0 0.1 1 10 0.7 0.8 0.9 0.5 0.4 0.3 0.2 0.1 0.6 1.0 v cc = 3.5v lbsel = gnd 125c 85c 25c ?45c i source (ma) 0 v cc ? v hbo (mv) 2.5 4071 g11 0 0.5 1 1.5 2 800 1000 200 400 600 1600 1800 1200 1400 2000 adj = gnd adj = v cc lbsel = v cc ntc = ntcbias i sink (ma) 0 v ol (mv) 6 4071 g12 0 2 4 5 1 3 300 600 900 1200 v cc = 4.0v v cc = 3.6v lbsel = v cc ntc = ntcbias temperature (c) ?50 ?25 v il /v ih (mv) 125 4071 g13 0 0 25 50 75 100 800 1000 1200 400 200 600 1400 v il v ih ntc temperature (c) 0 20 v f (v) 100 4071 g14 3.75 3.80 3.85 3.90 3.95 40 60 80 4.15 4.20 4.05 4.00 4.10 4.25 adj = v cc adj = float adj = gnd lbsel = v cc temperature (c) ?50 ?25 pulse width (s) 125 4071 g15 0 0 25 50 75 100 200 100 50 150 250 hbo low hbo high temperature (c) ?50 ?25 period (sec) 125 4071 g16 0 0 25 50 75 100 6 4 3 2 1 5 7 hbo low hbo high
LTC4071 6 4071fc p in func t ions ntcbias (pin 1): ntc bias pin. connect a resistor from ntcbias to ntc, and a thermistor from ntc to gnd. float ntcbias when not in use. minimize parasitic capacitance on this pin. ntc (pin 2): input to the negative temperature coefficient thermistor monitoring circuit. the ntc pin connects to a negative temperature coefficient thermistor which is typically co-packaged with the battery to determine the temperature of the battery. if the battery temperature is too high, the float voltage is reduced. connect a low drift bias resistor from ntcbias to ntc and a thermistor from ntc to gnd. when not in use, connect ntc to v cc . minimize parasitic capacitance on this pin. adj (pin 3): float voltage adjust pin. connect adj to gnd to program 4.0v float voltage. disconnect adj to program 4.1v float voltage. connect adj to v cc to program 4.2v float voltage. the float voltage is also adjusted by the ntc thermistor. hbo (pin 4): high battery monitor output (active high). hbo is a cmos output that indicates that the battery is almost fully charged and current is being shunted away from v cc . this pin is driven high when v cc rises to within v hbth of the effective float voltage, v float_eff . the absolute value of this threshold depends on adj and ntc both of which affect the float voltage. hbo is driven low when v cc falls by more than (v hbth + v hbhy ) below the effective float voltage. refer to table 1 for the effective float voltage. lbsel (pin 5): low battery disconnect select pin. con- nect lbsel to gnd to select a low battery disconnect level of 3.2v, connect lbsel to v cc to select a low battery disconnect level of 2.7v. do not float. gnd (pin 6, exposed pad pin 9): ground. the exposed package pad has no internal electrical connection but must be connected to pcb ground for maximum heat transfer. bat (pin 7): battery pin. battery charge current is sourced from v cc through this pin when an external supply is present. bat supplies current to v cc from this pin when no other source of power is available. if bat falls below v lbd this pin disconnects the battery from v cc protecting the battery from discharge by the load when no external power supply is present. v cc (pin 8): input supply pin. attach system load to this pin. the input supply voltage is regulated to 4.0v, 4.1v, or 4.2v depending on the adj pin state (see the adj pin description for more detail). this pin can sink up to 50ma in order to keep the voltage regulation within accuracy limits. decouple to gnd with a capacitor, c in , of at least 0.1f, use a larger decoupling cap to handle high peak load currents.
LTC4071 7 4071fc o pera t ion b lock diagra m the LTC4071 provides a simple, reliable, and high per - formance battery protection and charging solution by preventing the battery voltage from exceeding a pro - grammed level. its shunt architecture requires just one resistor from the input supply to charge and protect the battery in a wide range of battery applications. when the input supply is removed and the battery voltage is below the high battery output threshold, the LTC4071 consumes just 550na from the battery. if the battery voltage falls below the programmable low battery disconnect level, the battery disconnects from v cc , protecting the battery from over-discharge either by the load connected to v cc or from the LTC4071 quiescent current. when an input supply is present the battery charges through the body diode of the internal disconnect pfet, mp1, until the battery voltage rises above the low- battery connect threshold. select an input voltage large 4071 bd 3-state detect osc clk adj 0.9sec ? 7sec pulsed duty cycle = 0.003% 30s ? 200s ntcbias ntc r nom 10k 10k t ? + ? + ? + hbo lbsel lbsel must be tied to v cc or gnd v cc bat gnd ea adc LTC4071 1.2v 1.2v mp2 mp1 body diode li-ion battery + v in r in system load enough for v cc to reach v lbc_vcc to ensure that mp1 turns on. the user may detect the connected state by observing periodic pulses at the ntcbias pin that only occur once v cc has risen above v lbc_vcc , and cease once v cc falls below v lbd . depending on the capacity of the battery and the input decoupling capacitor, the v cc voltage generally falls to v bat when mp1 turns on; rather than v bat rising to v cc . the internal pfet then reconnects the battery to v cc and the charge rate is determined by the input voltage, the battery voltage, and the input resistor: i chg = v in ? v bat ( ) r in as the battery voltage approaches the float voltage, the LTC4071 shunts current away from the battery thereby reducing the charge current. the LTC4071 can shunt up to 50ma. the shunt current limits the maximum charge current.
LTC4071 8 4071fc o pera t ion in cases where the input supply may be shorted to gnd when not supplying power, for example with a solar cell, add a diode in series with r in to prevent the input from loading the battery. for more information, refer to the photovoltaic charger example in the applications information section. adjustable float voltage, v float a built-in 3-state decoder connected to the adj pin pro- vides three programmable float voltages: 4.0v, 4.1v, or 4.2v. the float voltage is programmed to 4.0v when adj is tied to gnd, 4.1v when adj is floating (disconnected), and 4.2v when adj is tied to v cc . the state of the adj pin (and ntc pins) is sampled for about 36s about once every 1.2 seconds when hbo is high, and when hbo is low the sampling rate reduces to about once every 3.6 seconds with the same duty cycle. if v cc falls below v lbd , the sampling stops. when it is being sampled, the LTC4071 applies a relatively low impedance voltage at the adj pin. this technique prevents low level board leakage from corrupting the programmed float voltage. ntc qualified float voltage, ?v float(ntc) the ntc pin voltage is compared against an internal resistor divider tied to the ntcbias pin. this divider has tap points that are matched to the ntc thermistor resis- tance/temperature conversion table for a vishay curve 2 thermistor at temperatures of 40c, 50c, 60c, and 70c. the curve 2 thermistor is also designated by a b25/85 value of 3490. battery temperature conditioning adjusts the float voltage down to v float_eff when the ntc thermistor indicates that the battery temperature is too high. for a 10k curve 2 thermistor and a 10k ntcbias resistor, each 10c increase in temperature above 40c causes the float voltage to drop by a fixed amount, ?v float(ntc) , depending on adj. if adj is at gnd, the float voltage steps down by 50mv for each 10c temperature increment. if adj is floating, the step size is 75mv. and if adj is at v cc , the step size is 100mv. refer to table 1 for the range of v float_eff programming. table 1. ntc qualified float voltage adj ?v float(ntc) temperature v ntc as % of ntcbias v float_eff gnd 50mv t < 40c 40c t < 50c 50c t < 60c 60c t < 70c 70c < t v ntc > 36.5 29.0 < v ntc 36.5 22.8 < v ntc 29.0 17.8 < v ntc 22.8 v ntc 17.8 4.000 3.950 3.900 3.850 3.800 floating 75mv t < 40c 40c t < 50c 50c t < 60c 60c t < 70c 70c < t v ntc > 36.5 29.0 < v ntc 36.5 22.8 < v ntc 29.0 17.8 < v ntc 22.8 v ntc 17.8 4.100 4.025 3.950 3.875 3.800 v cc 100mv t < 40c 40c t < 50c 50c t < 60c 60c t < 70c 70c < t v ntc > 36.5 29.0 < v ntc 36.5 22.8 < v ntc 29.0 17.8 < v ntc 22.8 v ntc 17.8 4.200 4.100 4.000 3.900 3.800 for all adj pin settings the lowest float voltage setting is: 3.8v = v float_min = v float C 4 ? ?v float(ntc) . this occurs at ntc thermistor temperatures above 70c, or if the ntc pin is grounded. to conserve power in the ntcbias and ntc resistors, the ntcbias pin is sampled at a low duty cycle at the same time that the adj pin state is sampled. high battery status output: hbo the hbo pin pulls high when v cc rises to within v hbth of the programmed float voltage, v float_eff , including ntc qualified float voltage adjustments assuming v cc has risen above v lbc_vcc . if v cc drops below the float voltage by more than v hbth + v hbhy the hbo pin pulls low to indicate that the battery is not at full charge. the input supply current to the LTC4071 drops to less than 550na (typ) as the LTC4071 no longer shunts current to protect the battery. and the ntcbias sample clock slows to conserve power. for example, if the ntc thermistor requires the float voltage to be dropped by 100mv (adj = v cc and 0.29 ? v ntcbias < v ntc < 0.36 ? v ntcbias ) then the hbo rising threshold is detected when v cc rises past: v float C ?v float(ntc) C v hbth = 4.2v C 100mv C 40mv = 3.96v.
LTC4071 9 4071fc o pera t ion low battery disconnect/connect: lbd/lbc the low battery disconnect (v lbd ) and connect (v lbc ) volt - age levels are programmed by the lbsel pin. as shown in the block diagram the battery disconnects from v cc by shutting off mp1 when the bat voltage falls below v lbd . this disconnect function protects li-ion batteries from permanent damage due to deep discharge. if the voltage of a li-ion cell drops below a certain level, the cell may be permanently damaged. disconnecting the battery from v cc prevents the load at v cc as well as the LTC4071 quiescent current from further discharging the battery. once disconnected the v cc voltage collapses towards ground. when an input supply is reconnected the bat- tery charges through the internal body diode of mp1. the input supply voltage should be larger than v lbc_vcc to ensure that mp1 is turned on. when the v cc voltage reaches v lbc_vcc , mp1 turns on and connects v cc and bat. while disconnected, the bat pin voltage is indirectly sensed through mp1s body diode. therefore v lbc varies with charge current and junction temperature. please see the typical performance characteristics section for more information. low battery select: lbsel the low battery discharge cutoff voltage level is pro - grammed by the lbsel pin. the lbsel pin allows the user to trade-off battery run - time and maximum shelf life. a lower battery disconnect threshold maximizes run time by allowing the battery to fully discharge before the disconnect event. conversely, by increasing the low battery disconnect threshold more capacity remains following the disconnect event which extends the shelf life of the battery. for maximum run time, tie lbsel to v cc so that the battery disconnects at v cc = 2.7v. for extended shelf life, tie lbsel to gnd so that the battery disconnects at v cc = 3.2v. if a high peak current event is expected, users may temporarily select the lower disconnect threshold. this avoids disconnect- ing the battery too early when the load works against the battery series resistance and temporarily reduces v cc .
LTC4071 10 4071fc a pplica t ions i n f or m a t ion adapter voltage (v wall ) is 12v and the maximum charge current is calculated as: i max _ charge = v wall ? v bat _ min ( ) r in = 12v ? 3.2v ( ) 162 ? = 54ma figure 3. 2-cell battery charger care must be taken in selecting the input resistor. power dissipated in r in under full charge current is given by the following equation: p diss = v wall ? v bat _ min ( ) 2 r in = 12v ? 3.2v ( ) 2 162 ? = 0.48w the charge current decreases as the battery voltage increases. if the battery voltage is 40mv less than the programmed float voltage the LTC4071 consumes only 550na of current, and all of the excess input current flows into the battery. as the battery voltage reaches the float voltage, the LTC4071 shunts current from the wall adapter and regulates the battery voltage to v float = v cc . the more shunt current the LTC4071 sinks, the less charge current the battery gets. eventually, the LTC4071 shunts all the current flowing through r in ; up to the maximum shunt current. the maximum shunt current in this case, with no ntc adjustment is determined by the input resistor and is calculated as: i shunt _ max = v wall ? v float ( ) r in = 12v ? 4.1v ( ) 162 ? = 49ma at this point the power dissipated in the input resistor is 388mw. the LTC4071 can also be used to regulate series-connected battery stacks as illustrated in figure 3. here two LTC4071 devices are used to charge two batteries in series. a single resistor sets the maximum charge/shunt current. LTC4071 bat r in gnd li-ion battery v cc + 1f 4071 f03 LTC4071 bat gnd li-ion battery v cc + 1f wall adapter general charging considerations the LTC4071 uses a different charging methodology from previous chargers. most li-ion chargers terminate the charging after a period of time. the LTC4071 does not have a discrete charge termination. extensive measurements on li-ion cells show that the cell charge current drops to very low levels with the shunt charge control circuit effectively terminating the charge. for improved battery lifetime choose 4.0v or 4.1v float voltage. the battery disconnect function requires some care in se - lecting the input supply compliance for charging a battery while powering a load at v cc . the internal battery discon - nect switch remains off while charging the battery through the body diode of the internal switch until v cc exceeds v lbc_vcc . if the source voltage compliance is not greater than v lbc_vcc , then the battery will never re-connect to v cc and the system load will not be able to run on battery power. users may detect that the battery is connected by monitoring the ntcbias pin as it will periodically pulse high once v cc has risen above v lbc_vcc , and stops pulsing once v cc falls below v lbd . the simplest application of the LTC4071 is shown in fig - ure 2. this application requires only an external resistor to program the charge/shunt current. assume the wall figure 2. single-cell battery charger 4071 f02 LTC4071 bat r in = 162, 0.5w gnd li-ion battery v cc + 1f wall adapter
LTC4071 11 4071fc a pplica t ions i n f or m a t ion the gnd pin of the top device is simply connected to the v cc pin of the bottom device. care must be taken in observing the hbo status output pin of the top device as this signal is no longer ground referenced. likewise for the control inputs of the top device; tie adj and lbsel of the top device to the local gnd or v cc pins. also, the wall adapter must have a high enough voltage rating to charge both cells. ntc protection the LTC4071 measures battery temperature with a negative temperature coefficient thermistor thermally coupled to the battery. ntc thermistors have temperature characteristics which are specified in resistance-temperature conversion tables. internal ntc circuitry protects the battery from excessive heat by reducing the float voltage for each 10c rise in temperature above 40c (assuming a vishay thermistor with a b 25/85 value of 3490). the LTC4071 uses a ratio of resistor values to measure battery temperature. the LTC4071 contains an internal fixed resistor voltage divider from ntcbias to gnd with four tap points; ntc th1 Cntc th4 . the voltages at these tap points are periodically compared against the voltage at the ntc pin to measure battery temperature. to conserve power, the battery temperature is measured periodically by biasing the ntcbias pin to v cc about once every 1.5 seconds. the voltage at the ntc pin depends on the ratio of ntc thermistor value, r ntc , and a bias resistor, r nom . choose r nom equal to the value of the thermistor at 25c. r nom is 10k for a vishay nths0402n02n1002f thermistor with a b 25/85 value of 3490. r nom must be connected from ntcbias to ntc. the ratio of the ntc pin voltage to the ntcbias voltage when it is pulsed to v cc is: r ntc r ntc + r nom ( ) when the thermistor temperature rises, the resistance drops; and the resistor divider between r nom and the thermistor lowers the voltage at the ntc pin. an ntc thermistor with a different b 25/85 value may also be used with the LTC4071. however the temperature trip points are shifted due to the higher negative temperature coefficient of the thermistor. to correct for this difference add a resistor, r fix , in series with the thermistor to shift the ratio: r fix + r ntc r fix + r ntc + r nom ( ) up to the internal resistive divider tap points: ntc th1 through ntc th4 . for a 100k thermistor with a b 25/85 value of 3950, e.g. nths0402n01n1003f, at 70c (with r nom = 100k) choose r fix = 3.92k. the temperature trip points are found by looking up the curve 1 thermistor r/t values plus r fix that correspond to the ratios for ntc th1 = 36.5%, ntc th2 = 29%, ntc th3 = 22.8%, and ntc th4 = 17.8%. selecting r fix = 3.92k results in trip points of 39.9c, 49.4c, 59.2c and 69.6c. another technique may be used without adding an ad- ditional component. instead decrease r nom to adjust the ntc th thresholds for a given r/t thermistor profile. for example, if r nom = 88.7k (with the same 100k thermis- tor) then the temperature trip points are 41.0c, 49.8c, 58.5c and 67.3c. when using the ntc features of the LTC4071 it is important to keep in mind that the maximum shunt current increases as the float voltage, v float_eff drops with ntc conditioning. reviewing the single-cell battery charger application with a 12v wall adapter in figure 2; the input resistor should be increased to 165? such that the maximum shunt current does not exceed 50ma at the lowest possible float voltage due to ntc conditioning, v float_min = 3.8v. thermal considerations at maximum shunt current, the LTC4071 may dissipate up to 205mw. the thermal dissipation of the package should be taken into account when operating at maximum shunt current so as not to exceed the absolute maximum junc- tion temperature of the device. with ja of 40c/w, in the msop package, at maximum shunt current of 50ma the junction temperature rise is about 8c above ambient. with ja of 76c/w in the dfn package, at maximum shunt current of 50ma the junction temperature rise is about 16c above ambient. the junction temperature, t j , is calculated depending on ambient temperature, t a , power
LTC4071 12 4071fc a pplica t ions i n f or m a t ion dissipation, pd (in w), and ja is the thermal impedance of the package (in c/w): t j = t a + (pd ja ). the application shown in figure 4 illustrates how to prevent triggering the low-battery disconnect function under large pulsed loads due to the high esr of thin-film batteries. figure 5. 4.2v ac line charging, ul leakage okay 4071 f05 LTC4071 ac 110v adjntc bat gnd li-ion battery ntcbias float v cc r1 = 249k r2 = 249k lbsel + system load mb4s ? + danger! high voltage r3 = 249k r4 = 249k dangerous and lethal potentials are present in ac line-connected circuits! before proceeding any further, the reader is warned that caution must be used in the construction, testing and use of ac line-connected circuits. extreme caution must be used in working with and making connections to these circuits. all testing performed on ac line-connected circuits must be done with an isolation transformer connected between the ac line and the circuit. users and constructors of ac line-connected circuits must observe this precaution when connecting test equipment to the circuit to avoid electric shock. age recovers, as the capacity of the battery should provide roughly 50 hours of use for an equivalent 0.1%?20ma = 20a load. to prevent load pulses from tripping the low battery disconnect, add a decoupling capacitor from v cc to gnd. the size of this capacitor can be calculated based on how much margin is required from the lbd threshold as well as the amplitude and pulse width of the load transient. for a 1.0mah battery with a state-of-charge of 3.8v, the margin from lbd is 600mv with lbsel tied to gnd. for a square-wave load pulse of 20ma with a pulse width of 5ms, the minimum size of the decoupling cap required to hold v cc above lbd is calculated as follows: c bypass = 20ma ? 5ms 600mv = 166.6f take care to select a bypass capacitor with low leakage. the LTC4071 can be used to charge a battery to a 4.2v float voltage from an ac line with a bridge rectifier as shown in the simple schematic in figure 5. in this example, figure 4. adding a decoupling capacitor for large load transients table 2 lists some thin-film batteries, their capacities and their equivalent series resistance. the esr causes v bat and v cc to droop as a product of the load current amplitude multiplied by the esr. this droop may trigger the low-battery disconnect while the battery itself may still have ample capacity. adding a bypass capacitor to v cc prevents large low duty cycle load transients from pulling down on v cc . table 2. low capacity li-ion and thin-film batteries vendor p/n capacity resistance v min cymbet cbc012 12ah 5k to 10k 3.0v cymbet cbc050 50ah 1500 to 3k 3.0v gs nanotech n/a 500ah 40 3.0v aps-autec lir2025 20mah 0.75 3.0v aps-autec lir1025 6mah 30 2.75v ips mec225-1p 0.13mah 210 to 260 2.1v ips mec220-4p 0.4mah 100 to 120 2.1v ips mec201-10p 1.0mah 34 to 45 2.1v ips mec202-25p 2.5mah 15 to 20 2.1v gm battery gmb031009 8mah 10 to 20 2.75v for example, given a 0.1% duty cycle 5ms load pulse of 20ma and a 1.0mah ips mec201-10p solid-state thin-film battery with an equivalent series resistance of 35?, the voltage drop at v cc can be as high as 0.7v while the load is on. however once the load pulse ends, the battery volt - LTC4071 bat ntcbias ntc lbsel adj r in v in gnd li-ion v cc + c bypass 4071 f04 float 10k nths0402n02n1002f t pulsed i load system load
LTC4071 13 4071fc figure 6. simple photovoltaic charger figure 7. piezoelectric energy harvester with battery backup LTC4071 bat gnd li-ion battery v cc + 4071 f07 LTC4071 ltc3588-1 bat lbsel lbsel gnd gnd pfcb-w14 li-ion battery v cc + 1f pz1 pz2 d1 d0 sw v out v in2 4.7f 3.3v system load 100f 10h capv in v in2 22f 1f mmsd4148t1 15k a pplica t ions i n f or m a t ion the four input 249k resistors are sized for acceptable ul leakage in the event that one of the resistors short. here, the LTC4071 will fully charge the battery from the ac line while meeting the ul specification with 104a of available charge current. a simple photovoltaic (pv) application for the LTC4071 is illustrated in figure 6. at low v cc voltage, pv current flows to both the system at v cc as well as the battery. when v cc reaches the programmed float voltage (4.1v with adj floating) then the LTC4071 shunts excess current not used by the load, limiting v cc to 4.1v and effectively reducing the battery charge current to zero. if the pv cells stop supplying current, the battery supports the load at v cc through the LTC4071. add a diode in series with the pv cells to prevent reverse leakage of the pv cells from draining the battery. if the battery discharges to the point where v cc falls below v lbd (3.2v with lbsel tied to gnd) the LTC4071 disconnects the load from the battery to protect the battery from over discharge. typically, solar cells are inherently limited in current, but this circuit may require a resistor, r in , in series with the LTC4071 for high current solar cells. select r in such that the LTC4071 never needs to shunt more than 50ma. the simple schematic in figure 7 illustrates a complete piezoelectric energy harvesting application using the LTC4071 to charge and protect li-ion cells along with the ltc3588-1 to rectify and regulate energy generated from a piezoelectric generator to a fixed 3.3v load. LTC4071 bat ntcbias ntc lbsel adj 1f gnd ds16003 li-ion v cc + 4071 f06 float * nths0402n02n1002f ** jameco 171061 10k t* system load ** ** ** ** + ? + ? + ? + ?
LTC4071 14 4071fc this system has two modes of operation, charging where the batteries are being charged from energy harvested from the piezoelectric generator while the load is negligible. and discharging, where the load is pulling current from the batteries, but insufficient energy is being harvested to power the load. this application allows the load to periodically draw more current than would otherwise be available from the piezo - electric generator by storing excess charge in a stack of two li-ion cells. each li-ion cell is protected from over - charge and over discharge by a LTC4071 shunt regulator. the two LTC4071s regulate v in of the ltc3588-1 to 8.2v (with both adj pins floating) shunting any excess current that is not used by the load once the batteries achieve their float voltages. when the load requires more current than is available from the piezoelectric generator, the voltage at v in droops and current is supplied from the two li-ion cells to power the step-down switching regulator. if the load pulls enough current to discharge the batteries below v lbd , the LTC4071s disconnect the batteries, and v in collapses until the piezoelectric generator resumes supplying current. the application in figure 8 illustrates how to implement ship-mode, where a battery is co-packaged with the LTC4071 and then the entire device is latched-off, leaving the battery fully charged but with the LTC4071 switched off. the co-packaged battery and LTC4071 can then be stored with a long shelf-life before being activated for normal use. ship-mode is triggered by pulling enough current through the LTC4071 so as to drop v cc below the lbd threshold. the current pulse amplitude should be less than 400ma with a duration of less than 10ms. the peak current neces - sary, i pk , depends on the equivalent series resistance of the battery, b esr , summed with the r dson of the bat-v cc fet, the battery voltage, v bat and the selected disconnect voltage, v lbd : i pk = v bat ? v lbd r dson + besr users may test that ship mode has been triggered by simply checking if v cc is at gnd and that there are no longer any ntcbias pulses. re-activation of the LTC4071 and the battery requires either applying power normally, or briefly shorting v cc to bat to turn it on. a pplica t ions i n f or m a t ion figure 8. LTC4071 ship-mode application for extended shelf life LTC4071 bat ntcbias ntc adj lbsel 1f current pulse to trigger ship-mode gnd li-ion v cc i pk 0 + 4071 f08 *nths0402n02n1002f 10k t*
LTC4071 15 4071fc p ackage descrip t ion ddb package 8-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1702 rev b) 2.00 0.10 (2 sides) note: 1. drawing conforms to version (wecd-1) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 0.56 0.05 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 2.15 0.05 (2 sides) 3.00 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0 ? 0.05 (ddb8) dfn 0905 rev b 0.25 0.05 2.20 0.05 (2 sides) recommended solder pad pitch and dimensions 0.61 0.05 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.25 0.05 0.50 bsc pin 1 r = 0.20 or 0.25 45 chamfer 0.50 bsc please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC4071 16 4071fc p ackage descrip t ion msop (ms8e) 0910 rev i 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does not include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 8 1 bottom view of exposed pad option 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 1.68 (.066) 1.88 (.074) 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 1.68 0.102 (.066 .004) 1.88 0.102 (.074 .004) 0.889 0.127 (.035 .005) recommended solder pad layout 0.65 (.0256) bsc 0.42 0.038 (.0165 .0015) typ 0.1016 0.0508 (.004 .002) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.05 ref 0.29 ref ms8e package 8-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1662 rev i) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC4071 17 4071fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 10/10 v lbd specification replaced in electrical characteristics section. 3 b 4/11 updated vishay thermistor part number. 11, 12, 13, 14, 18 c 10/11 under note 2, replaced = with ?. updated ips mfrs part numbers. updated the application example. updated mfr part number on the typical application circuit mec201-10p. 3 12 12 18
LTC4071 18 4071fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2010 lt 1011 rev c ? printed in usa r ela t e d p ar t s typical a pplica t ion typical application with 100f bypass capacitor to support large load pulse part number description comments ltc3105 400ma step-up converter with 250mv start-up and maximum power point control a high efficiency step-up dc/dc converter that can operate from input voltage as low as 200mv. a 250mv start-up capability and integrated maximum power point controller (mppt) enables operation directly from low voltage, high impedance alternative power sources such as photovoltaic cells, thermoelectric generators (tegs) and fuel cells. a user programmable mppc set point maximizes the energy that can be extracted from any power source. burst mode ? operation, with a proprietary self adjusting peak current, optimizes converter efficiency and output voltage ripple over all operating conditions. ltc3108/ ltc3108-1 ultralow power step-up converter and power manager a highly integrated dc/dc converter ideal for harvesting and managing surplus energy from extremely low input voltage sources such as tegs (thermoelectric generators), thermopiles and small solar cells. the step-up topology operates from input sources as low as 20mv. the ltc3108 is functionally equivalent to the ltc3108-1 except for its unique fixed v out options. ltc3388 20v high efficiency nanopower step-down regulator high efficiency step-down dc/dc converter with internal high side and synchronous power switches, draws only 720na typical dc supply current at no load. 50ma of load current, accurate uvlo disables converter and maintains low quiescent current state when the input voltage falls below 2.3v. 10-lead mse and 3mm 3mm dfn packages. ltc3588-1 piezoelectric energy harvesting power supply in 3mm w 3mm dfn and msop packages high efficiency hysteretic integrated buck dc/dc; 950na input quiescent current (output in regulation C no load), 520na input quiescent current in uvlo, 2.6v to 19.2v input operating range; integrated low-loss full-wave bridge rectifier, up to 100ma of output current, selectable output voltages of 1.8v, 2.5v, 3.3v or 3.6v. ltc4054l standalone linear li-ion battery charger in thinsot? low current version of ltc4054, 10ma i chg 150ma, thermal regulation prevents overheating, c/10 termination, with integrated pass transistor. ltc4065l standalone 250ma li-ion battery charger in 2mm w 2mm dfn low current version of ltc4065, 15ma i chg 250ma, 4.2v, 0.6% float voltage, high charge current accuracy: 5%. ltc4070 li-ion/polymer shunt battery charger system low 450na operating current, 50ma maximum internal shunt current, boostable to 500ma with external pfet LTC4071 bat ntcbias ntc lbsel adj float 5v to 12v 100f pulsed 200ma load gnd 165, 0.5w gmb031009 or gs nano or mec201-10p v cc t on = 1ms + 4071 ta02 *nths0402n02n1002f 10k t* low duty cycle system load

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